A resistive random-access memory (RRAM) is one type of non-volatile memory device which comprises a plurality of memory cells that maintain stored data when power is not supplied. RRAM is considered a promising candidate for next-generation nonvolatile memory, due to various advantages such as simplistic device structure, high scalability, high operating speed, and low power consumption. RRAM devices leverage a reversible resistive switching (RS) effect of certain materials to realize information storage. For example, a conventional structure of an RRAM device comprises a metal-insulator-metal (MIM) structure in which the insulator layer comprises a resistive switching layer that is formed from a material (e.g., metal oxide) which exhibits a resistive switching behavior. For example, a RRAM device may exhibit bi-polar switching properties to switch between a high conductivity state (or low resistance state (LRS)) when a first voltage is applied to the RRAM device, and a low conductivity state (or high resistance state (HRS)) when a second voltage is applied to the RRAM device. In this regard, the two states, LRS and HRS, of the RRAM device are reversible based on the voltage applied thereto.
With RRAM devices, an “electroforming” process is performed to form a conductive filament in the metal-oxide layer, which serves as a switching element for the RRAM device. The electroforming process is performed on newly manufactured RRAM devices to initialize the resistive switching properties of the memory cells. In general, an electroforming process for a given resistive RRAM device comprises applying a voltage pulse to the memory cell at a given voltage level and for a given duration to form a conductive filament within the resistive switching layer (e.g., metal-oxide layer) of the RRAM device. The electroforming process will vary depending on the structural configuration and resistive materials of the RRAM device.
To achieve scalability of in RRAM arrays formed of filament-type RRAM devices, it is important to minimize or otherwise control the cycle-to-cycle and device-to-device fluctuation/variation in the resistive switching characteristics of the RRAM devices, which results in variations in the switching currents of RRAM devices across the RRAM array. The variation in switching currents introduces noise within the read currents that are processed by peripheral circuitry utilized to control the RRAM array. The noise that is generated due to variations in the resistive switching characteristics of the RRAM devices increases and becomes more problematic with the scaling of RRAM arrays, which poses practical limits on RRAM scalability.